OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] - Rev 82

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).
lampret 8801d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
35 SLP hooks. lampret 8801d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
34 Started with SLP (not finished yet). lampret 8801d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
33 Handling of or1k exceptions. lampret 8805d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
32 Interrupt recognition. lampret 8805d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
30 Updated SPRs, exceptions. Added 16450 device. lampret 8805d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
29 Adding OR16/OR32 insn decoder. lampret 8820d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
28 Adding COFF loader. lampret 8820d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
26 Clean up. lampret 8836d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
25 Bug fix in handling labels when loading code into simulator memory. lampret 8836d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.