OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_12/] - Rev 1016

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7998d 22h /or1k/tags/rel_12/
993 Fixed IMMU bug. lampret 7998d 22h /or1k/tags/rel_12/
992 A bug when cache enabled and bus error comes fixed. simons 7999d 07h /or1k/tags/rel_12/
991 Different memory controller. simons 7999d 07h /or1k/tags/rel_12/
990 Test is now complete. simons 7999d 07h /or1k/tags/rel_12/
989 c++ is making problems so, for now, it is excluded. simons 8000d 15h /or1k/tags/rel_12/
988 ORP architecture supported. simons 8001d 07h /or1k/tags/rel_12/
987 ORP architecture supported. simons 8001d 14h /or1k/tags/rel_12/
986 outputs out of function are not registered anymore markom 8001d 15h /or1k/tags/rel_12/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8002d 02h /or1k/tags/rel_12/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.