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Rev Log message Author Age Path
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7742d 10h /or1k/tags/rel_19/or1200/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7742d 10h /or1k/tags/rel_19/or1200/
1130 RFRAM type always need to be defined. lampret 7742d 10h /or1k/tags/rel_19/or1200/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7742d 10h /or1k/tags/rel_19/or1200/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7817d 08h /or1k/tags/rel_19/or1200/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7862d 02h /or1k/tags/rel_19/or1200/
1083 SB mem width fixed. simons 7893d 21h /or1k/tags/rel_19/or1200/
1079 RAMs wrong connected to the BIST scan chain. mohor 7902d 19h /or1k/tags/rel_19/or1200/
1078 Previous check-in was done by mistake. mohor 7902d 20h /or1k/tags/rel_19/or1200/
1077 Signal scanb_sen renamed to scanb_en. mohor 7902d 20h /or1k/tags/rel_19/or1200/

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