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[/] [or1k/] [tags/] [rel_2/] [or1200/] [rtl/] - Rev 1765

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Rev Log message Author Age Path
775 Optimized cache controller FSM. lampret 8114d 18h /or1k/tags/rel_2/or1200/rtl/
774 Removed old files. lampret 8114d 18h /or1k/tags/rel_2/or1200/rtl/
737 Added alternative for critical path in DU. lampret 8129d 12h /or1k/tags/rel_2/or1200/rtl/
736 Changed generation of SPR address. Now it is ORed from base and offset instead of a sum. lampret 8132d 11h /or1k/tags/rel_2/or1200/rtl/
735 Fixed async loop. Changed multiplier type for ASIC. lampret 8132d 11h /or1k/tags/rel_2/or1200/rtl/
668 Lapsus fixed. simons 8156d 21h /or1k/tags/rel_2/or1200/rtl/
663 No longer using async rst as sync reset for the counter. lampret 8159d 11h /or1k/tags/rel_2/or1200/rtl/
660 Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. lampret 8160d 08h /or1k/tags/rel_2/or1200/rtl/
636 Fixed combinational loops. lampret 8169d 17h /or1k/tags/rel_2/or1200/rtl/
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8174d 12h /or1k/tags/rel_2/or1200/rtl/

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