URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_2/] [or1200/] [rtl/] - Rev 794

Rev	Log message	Author	Age	Path
595	Fixed 'the NPC single-step fix'.	lampret	8190d 01h	/or1k/tags/rel_2/or1200/rtl/
589	No more low/high priority interrupts (PICPR removed). Added tick timer exception. Added exception prefix (SR[EPH]). Fixed single-step bug whenreading NPC.	lampret	8190d 07h	/or1k/tags/rel_2/or1200/rtl/
573	Fixed module name when compiling with OR1200_XILINX_RAM32X1D	lampret	8193d 09h	/or1k/tags/rel_2/or1200/rtl/
571	Changed alignment exception EPCR. Not tested yet.	lampret	8193d 18h	/or1k/tags/rel_2/or1200/rtl/
570	Fixed order of syscall and range exceptions.	lampret	8193d 20h	/or1k/tags/rel_2/or1200/rtl/
569	Default ASIC configuration does not sample WB inputs.	lampret	8194d 06h	/or1k/tags/rel_2/or1200/rtl/
562	Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.	lampret	8194d 09h	/or1k/tags/rel_2/or1200/rtl/
536	Fixed typo. OR1200_REGISTERED_OUTPUTS was not defined. Should be.	lampret	8200d 14h	/or1k/tags/rel_2/or1200/rtl/
512	Uncommented OR1200_REGISTERED_OUTPUTS for FPGA target.	lampret	8204d 18h	/or1k/tags/rel_2/or1200/rtl/
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8205d 07h	/or1k/tags/rel_2/or1200/rtl/