URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] - Rev 1130

Rev	Log message	Author	Age	Path
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	8019d 22h	/or1k/tags/rel_26/or1200/rtl/
993	Fixed IMMU bug.	lampret	8019d 22h	/or1k/tags/rel_26/or1200/rtl/
984	Disable SB until it is tested	lampret	8023d 02h	/or1k/tags/rel_26/or1200/rtl/
977	Added store buffer.	lampret	8023d 04h	/or1k/tags/rel_26/or1200/rtl/
962	Fixed Xilinx trace buffer address. REported by Taylor Su.	lampret	8026d 18h	/or1k/tags/rel_26/or1200/rtl/
958	Disabled ITLB translation when 1) doing access to ITLB SPRs or 2) crossing page. This modification was tested only with parts of IMMU test - remaining test cases needs to be run.	lampret	8027d 18h	/or1k/tags/rel_26/or1200/rtl/
944	Added OR1200_WB_RETRY. Moved WB registered outsputs / samples inputs into lower section.	lampret	8029d 19h	/or1k/tags/rel_26/or1200/rtl/
943	Added optional retry counter for wb_rty_i. Added graceful termination for aborted transfers.	lampret	8029d 19h	/or1k/tags/rel_26/or1200/rtl/
942	Delayed external access at page crossing.	lampret	8029d 19h	/or1k/tags/rel_26/or1200/rtl/
916	MAC now follows software convention (signed multiply instead of unsigned).	lampret	8041d 22h	/or1k/tags/rel_26/or1200/rtl/