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[/] [or1k/] [tags/] [rel_27/] [or1200/] - Rev 1782

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Rev Log message Author Age Path
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7733d 12h /or1k/tags/rel_27/or1200/
1130 RFRAM type always need to be defined. lampret 7733d 12h /or1k/tags/rel_27/or1200/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7733d 12h /or1k/tags/rel_27/or1200/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7808d 10h /or1k/tags/rel_27/or1200/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7853d 05h /or1k/tags/rel_27/or1200/
1083 SB mem width fixed. simons 7885d 00h /or1k/tags/rel_27/or1200/
1079 RAMs wrong connected to the BIST scan chain. mohor 7893d 21h /or1k/tags/rel_27/or1200/
1078 Previous check-in was done by mistake. mohor 7893d 22h /or1k/tags/rel_27/or1200/
1077 Signal scanb_sen renamed to scanb_en. mohor 7893d 22h /or1k/tags/rel_27/or1200/
1069 Signal scanb_eni renamed to scanb_en mohor 7897d 15h /or1k/tags/rel_27/or1200/

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