URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_3/] [or1200/] [rtl/] - Rev 790

Rev	Log message	Author	Age	Path
573	Fixed module name when compiling with OR1200_XILINX_RAM32X1D	lampret	8213d 17h	/or1k/tags/rel_3/or1200/rtl/
571	Changed alignment exception EPCR. Not tested yet.	lampret	8214d 02h	/or1k/tags/rel_3/or1200/rtl/
570	Fixed order of syscall and range exceptions.	lampret	8214d 04h	/or1k/tags/rel_3/or1200/rtl/
569	Default ASIC configuration does not sample WB inputs.	lampret	8214d 13h	/or1k/tags/rel_3/or1200/rtl/
562	Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.	lampret	8214d 17h	/or1k/tags/rel_3/or1200/rtl/
536	Fixed typo. OR1200_REGISTERED_OUTPUTS was not defined. Should be.	lampret	8220d 22h	/or1k/tags/rel_3/or1200/rtl/
512	Uncommented OR1200_REGISTERED_OUTPUTS for FPGA target.	lampret	8225d 02h	/or1k/tags/rel_3/or1200/rtl/
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8225d 15h	/or1k/tags/rel_3/or1200/rtl/
402	Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32	lampret	8255d 18h	/or1k/tags/rel_3/or1200/rtl/
401	* empty log message *	simons	8259d 04h	/or1k/tags/rel_3/or1200/rtl/