URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_4/] [or1200/] - Rev 1780

Rev	Log message	Author	Age	Path
791	Fixed some ports in instnatiations that were removed from the modules	lampret	8115d 06h	/or1k/tags/rel_4/or1200/
790	Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives	lampret	8115d 06h	/or1k/tags/rel_4/or1200/
788	Some of the warnings fixed.	lampret	8115d 07h	/or1k/tags/rel_4/or1200/
778	Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs.	lampret	8116d 03h	/or1k/tags/rel_4/or1200/
777	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2	lampret	8116d 03h	/or1k/tags/rel_4/or1200/
776	Updated defines.	lampret	8116d 03h	/or1k/tags/rel_4/or1200/
775	Optimized cache controller FSM.	lampret	8116d 03h	/or1k/tags/rel_4/or1200/
774	Removed old files.	lampret	8116d 03h	/or1k/tags/rel_4/or1200/
737	Added alternative for critical path in DU.	lampret	8130d 22h	/or1k/tags/rel_4/or1200/
736	Changed generation of SPR address. Now it is ORed from base and offset instead of a sum.	lampret	8133d 21h	/or1k/tags/rel_4/or1200/