OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] [or1200/] - Rev 1036

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
870 Added defines for enabling generic FF based memory macro for register file. lampret 8056d 17h /or1k/tags/rel_7/or1200/
869 Added generic flip-flop based memory macro instantiation. lampret 8056d 17h /or1k/tags/rel_7/or1200/
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8127d 17h /or1k/tags/rel_7/or1200/
794 Added again just recently removed full_case directive lampret 8127d 17h /or1k/tags/rel_7/or1200/
791 Fixed some ports in instnatiations that were removed from the modules lampret 8127d 17h /or1k/tags/rel_7/or1200/
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8127d 17h /or1k/tags/rel_7/or1200/
788 Some of the warnings fixed. lampret 8127d 18h /or1k/tags/rel_7/or1200/
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8128d 14h /or1k/tags/rel_7/or1200/
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8128d 14h /or1k/tags/rel_7/or1200/
776 Updated defines. lampret 8128d 14h /or1k/tags/rel_7/or1200/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.