URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] [or1200/] - Rev 1053

Rev	Log message	Author	Age	Path
943	Added optional retry counter for wb_rty_i. Added graceful termination for aborted transfers.	lampret	7987d 08h	/or1k/tags/rel_7/or1200/
942	Delayed external access at page crossing.	lampret	7987d 08h	/or1k/tags/rel_7/or1200/
916	MAC now follows software convention (signed multiply instead of unsigned).	lampret	7999d 11h	/or1k/tags/rel_7/or1200/
895	Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.	lampret	8015d 15h	/or1k/tags/rel_7/or1200/
871	Generic flip-flop based memory macro for register file.	lampret	8051d 21h	/or1k/tags/rel_7/or1200/
870	Added defines for enabling generic FF based memory macro for register file.	lampret	8051d 21h	/or1k/tags/rel_7/or1200/
869	Added generic flip-flop based memory macro instantiation.	lampret	8051d 21h	/or1k/tags/rel_7/or1200/
795	Added a directive to ignore signed division variables that are only used in simulation.	lampret	8122d 21h	/or1k/tags/rel_7/or1200/
794	Added again just recently removed full_case directive	lampret	8122d 21h	/or1k/tags/rel_7/or1200/
791	Fixed some ports in instnatiations that were removed from the modules	lampret	8122d 21h	/or1k/tags/rel_7/or1200/