URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] [or1200/] [rtl/] [verilog/] - Rev 993

Rev	Log message	Author	Age	Path
776	Updated defines.	lampret	8163d 20h	/or1k/tags/rel_7/or1200/rtl/verilog/
775	Optimized cache controller FSM.	lampret	8163d 20h	/or1k/tags/rel_7/or1200/rtl/verilog/
774	Removed old files.	lampret	8163d 20h	/or1k/tags/rel_7/or1200/rtl/verilog/
737	Added alternative for critical path in DU.	lampret	8178d 15h	/or1k/tags/rel_7/or1200/rtl/verilog/
736	Changed generation of SPR address. Now it is ORed from base and offset instead of a sum.	lampret	8181d 14h	/or1k/tags/rel_7/or1200/rtl/verilog/
735	Fixed async loop. Changed multiplier type for ASIC.	lampret	8181d 14h	/or1k/tags/rel_7/or1200/rtl/verilog/
668	Lapsus fixed.	simons	8206d 00h	/or1k/tags/rel_7/or1200/rtl/verilog/
663	No longer using async rst as sync reset for the counter.	lampret	8208d 14h	/or1k/tags/rel_7/or1200/rtl/verilog/
660	Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr.	lampret	8209d 11h	/or1k/tags/rel_7/or1200/rtl/verilog/
636	Fixed combinational loops.	lampret	8218d 19h	/or1k/tags/rel_7/or1200/rtl/verilog/