OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_8/] [or1200/] [rtl/] - Rev 994

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8128d 08h /or1k/tags/rel_8/or1200/rtl/
776 Updated defines. lampret 8128d 08h /or1k/tags/rel_8/or1200/rtl/
775 Optimized cache controller FSM. lampret 8128d 08h /or1k/tags/rel_8/or1200/rtl/
774 Removed old files. lampret 8128d 09h /or1k/tags/rel_8/or1200/rtl/
737 Added alternative for critical path in DU. lampret 8143d 03h /or1k/tags/rel_8/or1200/rtl/
736 Changed generation of SPR address. Now it is ORed from base and offset instead of a sum. lampret 8146d 02h /or1k/tags/rel_8/or1200/rtl/
735 Fixed async loop. Changed multiplier type for ASIC. lampret 8146d 02h /or1k/tags/rel_8/or1200/rtl/
668 Lapsus fixed. simons 8170d 12h /or1k/tags/rel_8/or1200/rtl/
663 No longer using async rst as sync reset for the counter. lampret 8173d 02h /or1k/tags/rel_8/or1200/rtl/
660 Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. lampret 8173d 23h /or1k/tags/rel_8/or1200/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.