URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_1_0/] - Rev 371

Rev	Log message	Author	Age	Path
351	Fixed some l.trap typos.	lampret	8254d 04h	/or1k/tags/stable_0_1_0/
350	For GDB changed single stepping and disabled trap exception.	lampret	8254d 05h	/or1k/tags/stable_0_1_0/
349	Some bugs regarding cache simulation fixed.	simons	8255d 18h	/or1k/tags/stable_0_1_0/
348	Added instructions on how to build configure.	ivang	8257d 02h	/or1k/tags/stable_0_1_0/
347	Added CRC32 calculation to Ethernet	erez	8257d 23h	/or1k/tags/stable_0_1_0/
346	Improved Ethernet simulation	erez	8258d 00h	/or1k/tags/stable_0_1_0/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8258d 00h	/or1k/tags/stable_0_1_0/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8258d 02h	/or1k/tags/stable_0_1_0/
343	Small touches to test programs	erez	8258d 05h	/or1k/tags/stable_0_1_0/
342	added exception vectors to support and modified section names	markom	8259d 01h	/or1k/tags/stable_0_1_0/