URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 500

Rev	Log message	Author	Age	Path
480	RTL_SIM define added for shorter simulation runtime.	simons	8238d 03h	/or1k/tags/stable_0_2_0_rc1/
479	connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed	markom	8238d 03h	/or1k/tags/stable_0_2_0_rc1/
478	Started adding acv_gpio testbench	erez	8238d 03h	/or1k/tags/stable_0_2_0_rc1/
477	Improved multi-id vapi logs (i.e. GPIO)	erez	8238d 03h	/or1k/tags/stable_0_2_0_rc1/
476	Fixed warnings.	ivang	8238d 04h	/or1k/tags/stable_0_2_0_rc1/
475	l.jalr r9 is not used any more.	simons	8238d 05h	/or1k/tags/stable_0_2_0_rc1/
474	Updated building instructions. or1.h not used anymore.	ivang	8238d 05h	/or1k/tags/stable_0_2_0_rc1/
473	Added test flag templates.	ivang	8238d 09h	/or1k/tags/stable_0_2_0_rc1/
472	Removed MC initialization. Must be done in except_mc.S	ivang	8238d 09h	/or1k/tags/stable_0_2_0_rc1/
471	Removed MC initialization. Must be done in except_mc.S	ivang	8238d 09h	/or1k/tags/stable_0_2_0_rc1/