URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 80

Rev	Log message	Author	Age	Path
60	Memory model changed.	lampret	8711d 08h	/or1k/tags/stable_0_2_0_rc1/
59	2000-09-05 Joel Sherrill <joel@OARcorp.com> * Merged newlib-1.8.2-rtems-20000905.diff which includes or16 and or32 configuration support.	joel	8711d 19h	/or1k/tags/stable_0_2_0_rc1/
57	This commit was generated by cvs2svn to compensate for changes in r56, which included commits to RCS files with non-trunk default branches.	joel	8717d 17h	/or1k/tags/stable_0_2_0_rc1/
55	Added 'dv' command for dumping memory as verilog model.	lampret	8727d 05h	/or1k/tags/stable_0_2_0_rc1/
54	Regular maintenance.	lampret	8727d 05h	/or1k/tags/stable_0_2_0_rc1/
53	Added setjmp/longjmp.	lampret	8732d 05h	/or1k/tags/stable_0_2_0_rc1/
52	Comment character changed.	lampret	8788d 01h	/or1k/tags/stable_0_2_0_rc1/
51	Exception detection changed a bit.	lampret	8788d 01h	/or1k/tags/stable_0_2_0_rc1/
50	Added CURINSN macro.	lampret	8788d 01h	/or1k/tags/stable_0_2_0_rc1/
49	Changed simulation mode to non-virtual (real).	lampret	8788d 01h	/or1k/tags/stable_0_2_0_rc1/