URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 1560

Rev	Log message	Author	Age	Path
1539	Speed up the dmmu	nogj	6922d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1538	Speed up the immu	nogj	6922d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1537	Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr	nogj	6922d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1532	Add pretty spr dumping code	nogj	6925d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1531	Remove non-trigerable out-of-range checks	nogj	6925d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1530	Move the checking of the debug channel into the TRACE() macro	nogj	6925d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1529	* The effective address as written to the I/DCBPR registers needs to be translated by the respective mmu. * Don't treat any values as special in the handling of DCPBR, DCBFR, DCBIR, ICBPR and ICBIR.	nogj	6926d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1528	s/HAS_ISBLANK/HAVE_ISBLANK/ fix compileing on windows/cygwin. Reported by Kuoping Hsu and Girish Venkatar	nogj	6927d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1527	Fix the execution log when an mtspr instruction causes an itlb miss	nogj	6927d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/
1526	Fix a very outdated comment	nogj	6927d 02h	/or1k/tags/stable_0_2_0_rc1/or1ksim/