URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [bpb/] - Rev 1765

Rev	Log message	Author	Age	Path
102	Major update to include PM, PIC, Cache Mngmnt and non-interactive mode.	lampret	8406d 14h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
54	Regular maintenance.	lampret	8676d 12h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
28	Adding COFF loader.	lampret	8767d 18h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
26	Clean up.	lampret	8783d 15h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
18	or16 added, or1k renamed to or32.	lampret	8786d 11h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
13	Rebuild of the generated files.	jrydberg	8847d 03h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
7	Major update of the enviorment. Now uses autoconf and automake. The simulator uses readline aswell to get input from the user. A number of new files added, some modified. The libc directory is now called support.	jrydberg	8847d 03h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8847d 21h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/
3	This commit was generated by cvs2svn to compensate for changes in r2, which included commits to RCS files with non-trunk default branches.	cvs	8973d 15h	/or1k/tags/stable_0_2_0_rc1/or1ksim/bpb/