OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cpu/] - Rev 1302

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1117 Ignore generated files for CVS purposes sfurman 7839d 12h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1114 Added cvs log keywords lampret 7870d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1106 Cache invalidate bug fixed again (it was ok before). simons 7919d 19h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1097 Cache invalidate bug fixed. simons 7926d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7933d 10h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1061 ELF sym loading improved markom 7979d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1049 Added "breaks" command that prints all set breakpoints. ivang 8006d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1034 Fixed encoding for l.div/l.divu. lampret 8012d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1025 PRINTF/printf mess fixed. simons 8015d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 8016d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cpu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.