URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [debug/] - Rev 1546

Rev	Log message	Author	Age	Path
1147	remove unneeded include	phoenix	7779d 03h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
1117	Ignore generated files for CVS purposes	sfurman	7822d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
997	PRINTF should be used instead of printf; command redirection repaired	markom	8010d 21h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
970	Testbench is now running on ORP architecture platform.	simons	8018d 08h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
884	code cleaning - a lot of global variables moved to runtime struct	markom	8054d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
876	Beta release of ATA simulation	rherveille	8062d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
693	exception info is outputted only in verbose mode	markom	8194d 22h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
643	Quick bug fix.	ivang	8210d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
642	Modified logging of SPR accesses. Logging only explicit instruction accesses.	ivang	8210d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/
600	No more low/high priority interrupts (PICPR removed). Added tick timer exception.	simons	8226d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/debug/