URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [pic/] - Rev 1765

Rev	Log message	Author	Age	Path
729	some small optimizations	markom	8128d 04h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
611	EEAR register is not changed by trap, sys, int, tick and range exception.	simons	8171d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
600	No more low/high priority interrupts (PICPR removed). Added tick timer exception.	simons	8174d 16h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
567	Commit lapsus fixed.	simons	8180d 07h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
561	Tick timer is not connected to PIC.	simons	8180d 22h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
557	some optimizations; fsim running at 2MIPS; pm section added to config; configure bug fixed	markom	8184d 05h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
517	some performance optimizations	markom	8190d 01h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
500	Added .cvsignore files for annoying generated files	erez	8192d 05h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
409	some minor changes to or1ksim; Testbench except.s modified. Interrupt test almost finished for uart ACV.	markom	8219d 06h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/
349	Some bugs regarding cache simulation fixed.	simons	8238d 19h	/or1k/tags/stable_0_2_0_rc1/or1ksim/pic/