URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] - Rev 1585

Rev	Log message	Author	Age	Path
1564	Fix internal clock handling	nogj	6867d 15h	/or1k/tags/stable_0_2_0_rc2/
1563	Fix sending too many interrupts in the uart	nogj	6867d 15h	/or1k/tags/stable_0_2_0_rc2/
1562	Remove the no-longer used --enable-impl configure option	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1561	Fix segfault when parsing unknown config sections	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1560	Fix bug of not reporting timer interrupts when one was pending and a write happens to the ttmr spr that is not clearing the interrupt pending flag	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1559	Make the tick interrupt work when except_handle does not return	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1558	Fix a bug where the scheduler stack would underrun when a job was scheduled run in negative time	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1557	Fix most warnings issued by gcc4	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1556	Create an 8-bit program load function to be able to load an unaligned section	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/
1555	* Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell. * Changed code to use log2_int() instead of log2(), which is also a builtin library function (fixes compile on gcc4). * Moved is_power2() from sim-config.c to misc.c.	nogj	6868d 23h	/or1k/tags/stable_0_2_0_rc2/