URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [cache/] - Rev 1432

Rev	Log message	Author	Age	Path
638	TLBTR CI bit is now working properly.	simons	8195d 20h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
631	Real cache access is simulated now.	simons	8198d 19h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
626	store buffer added	markom	8199d 08h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
541	lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES!	markom	8220d 04h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
517	some performance optimizations	markom	8224d 03h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
500	Added .cvsignore files for annoying generated files	erez	8226d 07h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
429	cache configuration added	markom	8248d 02h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
428	cache configuration added	markom	8248d 02h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
261	modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc	markom	8287d 07h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/
247	Major update of the enviorment. Now uses autoconf and automake. The simulator uses readline aswell to get input from the user. A number of new files added, some modified. The libc directory is now called support.	jrydberg	8291d 13h	/or1k/tags/stable_0_2_0_rc3/or1ksim/cache/