URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 1149

Rev	Log message	Author	Age	Path
1129	Added Altera LPM RAMs. Changed generic RAM output when OE inactive.	lampret	7752d 11h	/or1k/trunk/
1128	Fixed my bustage: Add missing 2nd argument to open(). Otherwise, opening a serial port channel can sporadically fail.	sfurman	7757d 10h	/or1k/trunk/
1127	Added ability to map I/O from simulated UARTs to physical serial ports on the host running the simulator.	sfurman	7760d 11h	/or1k/trunk/
1126	Added lengthy comment explaining all possible choices for UART channels, e.g. xterm, tcp, file, etc.	sfurman	7762d 13h	/or1k/trunk/
1125	This test case passes.	lampret	7773d 17h	/or1k/trunk/
1124	Initialize or1k_implementation with reasonable defaults for the number of implementation registers. This doesn't affect the jtag or sim targets at all because those values are always overwritten when or1k_implementation is initialized. However, it is necessary when connecting to remote gdb stubs through a serial port or socket, since or1k_implementation is not yet initialized for those targets.	sfurman	7783d 08h	/or1k/trunk/
1123	Renumber/rename SPRs to match latest architecture doc	sfurman	7784d 15h	/or1k/trunk/
1122	Get rid of C++ style declarations (which can appear in the middle of a block) in C program. Some older compilers complain.	sfurman	7789d 16h	/or1k/trunk/
1121	Ignore generated files	sfurman	7789d 17h	/or1k/trunk/
1120	Fix my dumb automake bustage	sfurman	7789d 17h	/or1k/trunk/