URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] - Rev 373

Rev	Log message	Author	Age	Path
353	Cashes disabled.	simons	8288d 11h	/or1k/trunk/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8289d 14h	/or1k/trunk/
351	Fixed some l.trap typos.	lampret	8289d 15h	/or1k/trunk/
350	For GDB changed single stepping and disabled trap exception.	lampret	8289d 17h	/or1k/trunk/
349	Some bugs regarding cache simulation fixed.	simons	8291d 05h	/or1k/trunk/
348	Added instructions on how to build configure.	ivang	8292d 13h	/or1k/trunk/
347	Added CRC32 calculation to Ethernet	erez	8293d 10h	/or1k/trunk/
346	Improved Ethernet simulation	erez	8293d 12h	/or1k/trunk/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8293d 12h	/or1k/trunk/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8293d 14h	/or1k/trunk/