URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cache/] - Rev 1776

Rev	Log message	Author	Age	Path
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7052d 16h	/or1k/trunk/or1ksim/cache/
1344	* Avoid doing a store in every instruction executed by storeing the instruction function unit in or32_opcodes	nogj	7065d 20h	/or1k/trunk/or1ksim/cache/
1308	Gyorgy Jeney: extensive cleanup	phoenix	7257d 11h	/or1k/trunk/or1ksim/cache/
1249	Downgrading back to automake-1.4	lampret	7422d 10h	/or1k/trunk/or1ksim/cache/
1117	Ignore generated files for CVS purposes	sfurman	7765d 11h	/or1k/trunk/or1ksim/cache/
1099	cvs bug fixed	markom	7851d 22h	/or1k/trunk/or1ksim/cache/
1085	Bug fixed.	simons	7864d 12h	/or1k/trunk/or1ksim/cache/
997	PRINTF should be used instead of printf; command redirection repaired	markom	7954d 01h	/or1k/trunk/or1ksim/cache/
992	A bug when cache enabled and bus error comes fixed.	simons	7955d 16h	/or1k/trunk/or1ksim/cache/
970	Testbench is now running on ORP architecture platform.	simons	7961d 12h	/or1k/trunk/or1ksim/cache/