OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] - Rev 714

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8197d 16h /or1k/trunk/or1ksim/cpu/
638 TLBTR CI bit is now working properly. simons 8200d 09h /or1k/trunk/or1ksim/cpu/
631 Real cache access is simulated now. simons 8203d 08h /or1k/trunk/or1ksim/cpu/
630 some bug fixes in store buffer analysis markom 8203d 17h /or1k/trunk/or1ksim/cpu/
629 typo fixed markom 8203d 20h /or1k/trunk/or1ksim/cpu/
627 or32 restored markom 8203d 21h /or1k/trunk/or1ksim/cpu/
626 store buffer added markom 8203d 21h /or1k/trunk/or1ksim/cpu/
624 Added logging of writes/read to/from SPR registers. ivang 8204d 13h /or1k/trunk/or1ksim/cpu/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8204d 15h /or1k/trunk/or1ksim/cpu/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8204d 19h /or1k/trunk/or1ksim/cpu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.