OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [mmu/] - Rev 1776

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1418 Rearange some code such that it is not assumed that except_handle returns nogj 7011d 14h /or1k/trunk/or1ksim/mmu/
1416 Make the immu use the new debug functions nogj 7011d 14h /or1k/trunk/or1ksim/mmu/
1414 Rearange code in the dmmu such that it is not assumed that except_handle returns nogj 7011d 14h /or1k/trunk/or1ksim/mmu/
1412 Make the dmmu use the new debug functions nogj 7011d 14h /or1k/trunk/or1ksim/mmu/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.
nogj 7026d 18h /or1k/trunk/or1ksim/mmu/
1376 aclocal && autoconf && automake phoenix 7045d 18h /or1k/trunk/or1ksim/mmu/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7052d 09h /or1k/trunk/or1ksim/mmu/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7061d 12h /or1k/trunk/or1ksim/mmu/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7074d 16h /or1k/trunk/or1ksim/mmu/
1308 Gyorgy Jeney: extensive cleanup phoenix 7266d 07h /or1k/trunk/or1ksim/mmu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.