URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_13/] - Rev 92

Rev	Log message	Author	Age	Path
68	Changed wrong signal name scanb_sen into scanb_en.	tadejm	7936d 02h	/pci/tags/rel_13/
67	Changed BIST signals for RAMs.	tadejm	7936d 07h	/pci/tags/rel_13/
66	Changed empty status generation in pciw_fifo_control.v	mihad	7939d 18h	/pci/tags/rel_13/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7942d 16h	/pci/tags/rel_13/
64	The testcase I just added in previous revision repaired	mihad	7942d 18h	/pci/tags/rel_13/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7942d 20h	/pci/tags/rel_13/
62	Added BIST signals for RAMs.	mihad	7945d 13h	/pci/tags/rel_13/
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7953d 13h	/pci/tags/rel_13/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7953d 14h	/pci/tags/rel_13/
58	Removed all logic from asynchronous reset network	mihad	7958d 14h	/pci/tags/rel_13/