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[/] [pci/] [tags/] [rel_5/] - Rev 81

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Rev Log message Author Age Path
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7947d 09h /pci/tags/rel_5/
56 Number of state bits define was removed mihad 7948d 00h /pci/tags/rel_5/
55 Changed state machine encoding to true one-hot mihad 7948d 01h /pci/tags/rel_5/
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7981d 02h /pci/tags/rel_5/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7981d 06h /pci/tags/rel_5/
52 Oops, never before noticed that OC header is missing mihad 7981d 10h /pci/tags/rel_5/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7981d 10h /pci/tags/rel_5/
50 Got rid of undef directives mihad 7984d 02h /pci/tags/rel_5/
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7984d 02h /pci/tags/rel_5/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7984d 02h /pci/tags/rel_5/

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