URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_6/] - Rev 83

Rev	Log message	Author	Age	Path
58	Removed all logic from asynchronous reset network	mihad	7961d 09h	/pci/tags/rel_6/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7961d 15h	/pci/tags/rel_6/
56	Number of state bits define was removed	mihad	7962d 05h	/pci/tags/rel_6/
55	Changed state machine encoding to true one-hot	mihad	7962d 06h	/pci/tags/rel_6/
54	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim	mihad	7995d 08h	/pci/tags/rel_6/
53	Updated for synthesis purposes. Gate level simulation was failing in some configurations	mihad	7995d 11h	/pci/tags/rel_6/
52	Oops, never before noticed that OC header is missing	mihad	7995d 15h	/pci/tags/rel_6/
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	7995d 15h	/pci/tags/rel_6/
50	Got rid of undef directives	mihad	7998d 08h	/pci/tags/rel_6/
49	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives	mihad	7998d 08h	/pci/tags/rel_6/