URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_6/] - Rev 90

Rev	Log message	Author	Age	Path
66	Changed empty status generation in pciw_fifo_control.v	mihad	7985d 04h	/pci/tags/rel_6/
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7988d 02h	/pci/tags/rel_6/
64	The testcase I just added in previous revision repaired	mihad	7988d 04h	/pci/tags/rel_6/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7988d 06h	/pci/tags/rel_6/
62	Added BIST signals for RAMs.	mihad	7990d 23h	/pci/tags/rel_6/
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7998d 23h	/pci/tags/rel_6/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7999d 00h	/pci/tags/rel_6/
58	Removed all logic from asynchronous reset network	mihad	8004d 01h	/pci/tags/rel_6/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	8004d 07h	/pci/tags/rel_6/
56	Number of state bits define was removed	mihad	8004d 21h	/pci/tags/rel_6/