URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] - Rev 81

Rev	Log message	Author	Age	Path
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7986d 13h	/pci/tags/rel_7/
56	Number of state bits define was removed	mihad	7987d 04h	/pci/tags/rel_7/
55	Changed state machine encoding to true one-hot	mihad	7987d 04h	/pci/tags/rel_7/
54	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim	mihad	8020d 06h	/pci/tags/rel_7/
53	Updated for synthesis purposes. Gate level simulation was failing in some configurations	mihad	8020d 09h	/pci/tags/rel_7/
52	Oops, never before noticed that OC header is missing	mihad	8020d 13h	/pci/tags/rel_7/
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	8020d 14h	/pci/tags/rel_7/
50	Got rid of undef directives	mihad	8023d 06h	/pci/tags/rel_7/
49	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives	mihad	8023d 06h	/pci/tags/rel_7/
48	Extracted distributed RAM module from wb/pci_tpram.v to its own file	mihad	8023d 06h	/pci/tags/rel_7/