OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_9/] - Rev 93

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
69 Changed BIST signal names etc.. mihad 7921d 04h /pci/tags/rel_9/
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7924d 14h /pci/tags/rel_9/
67 Changed BIST signals for RAMs. tadejm 7924d 18h /pci/tags/rel_9/
66 Changed empty status generation in pciw_fifo_control.v mihad 7928d 05h /pci/tags/rel_9/
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7931d 03h /pci/tags/rel_9/
64 The testcase I just added in previous revision repaired mihad 7931d 05h /pci/tags/rel_9/
63 Added additional testcase and changed rst name in BIST to trst mihad 7931d 07h /pci/tags/rel_9/
62 Added BIST signals for RAMs. mihad 7934d 00h /pci/tags/rel_9/
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7942d 00h /pci/tags/rel_9/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7942d 01h /pci/tags/rel_9/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.