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213 Arithpack: changes to suppport the Beta Raytrac RTL description (with almost DMA caps) jguarin2002 4351d 06h /raytrac/
212 DPC changes\n\n\t+ established the DCS system rather than the UCA definitively\n\t+ Rather than usign 4 result queues now theres just a single one, of course 4 times wider, this was made to gain simplicity when writing and reading the RTL description that adapts this 4/3/1 word wide result buffer output into a 1 word wide result buffer input\n\t+ Added the Q1 queue to syncrhonize magnitude and normalization ops, managing them to enter at the sime tame rather than different times, formerly it was implemented by setting the normalization and magnitude results into the results buffers at 25th beat and 20th beat respectively, now both results enter into THE SINGLE RESULT QUEUE at 25th beat. This change also forces that Dot product operation to use the Q1 hardware and entering also at beath 25th into the result queue, it could be done in an earlier beatt (in fact in the 19th) but multiplexation logic would have to be added. jguarin2002 4351d 07h /raytrac/
211 Raytrac Beta 0.1 with Avalon MM Master & Avalon MM Slave Interfaces. Done\! jguarin2002 4351d 07h /raytrac/
210 Document advance..... towards dma oriented raytrac jguarin2002 4362d 19h /raytrac/
209 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/
208 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/
207 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/
206 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/
205 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/
204 Working towards a DMA oriented RayTRac jguarin2002 4362d 20h /raytrac/

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