URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] - Rev 38

Rev	Log message	Author	Age	Path
18	Changed S1_ROOT to work in home dir, and T1_ROOT to remove version number.	fafa1971	6318d 00h	/s1_core/trunk/
17	Added reference to original OpenSPARC boot code source file.	fafa1971	6318d 05h	/s1_core/trunk/
16	Added the 3 new defines to make the design: - synthesizable for FPGA - single-threaded - without the cryptographic SPU unit	fafa1971	6318d 09h	/s1_core/trunk/
15	Removed the remove of CVS subdirs...	fafa1971	6318d 10h	/s1_core/trunk/
14	Now the ACCESSES file perfectly documents the list of instructions fetched both by the T1 and the S1, and the difference is shown. To obtain the disassembled code the "disass" tool (under tools/opt) has been used.	fafa1971	6369d 02h	/s1_core/trunk/
13	Added first version of small tool to reverse engineer the boot code used by the T1.	fafa1971	6378d 03h	/s1_core/trunk/
12	Updated the PCX/CPX fields description with all the info required for debugging.	fafa1971	6378d 19h	/s1_core/trunk/
11	Corrected the bug about the packet format, now we are near to perfection...	fafa1971	6378d 22h	/s1_core/trunk/
10	First version.	fafa1971	6399d 19h	/s1_core/trunk/
9	First release.	fafa1971	6399d 19h	/s1_core/trunk/