URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] - Rev 43

Rev	Log message	Author	Age	Path
23	Fresh file taken from the most recent OpenSPARC 1.4.	fafa1971	6351d 17h	/s1_core/trunk/
22	Removed files of OpenSPARC 1.3 to later add the 1.4 ones.	fafa1971	6351d 17h	/s1_core/trunk/
21	Removed files of OpenSPARC 1.3 to later add version 1.4 ones.	fafa1971	6351d 17h	/s1_core/trunk/
20	Removed all the files of OpenSPARC 1.3 to later add the 1.4 ones.	fafa1971	6351d 17h	/s1_core/trunk/
19	* empty log message *	fafa1971	6351d 17h	/s1_core/trunk/
18	Changed S1_ROOT to work in home dir, and T1_ROOT to remove version number.	fafa1971	6351d 17h	/s1_core/trunk/
17	Added reference to original OpenSPARC boot code source file.	fafa1971	6351d 22h	/s1_core/trunk/
16	Added the 3 new defines to make the design: - synthesizable for FPGA - single-threaded - without the cryptographic SPU unit	fafa1971	6352d 03h	/s1_core/trunk/
15	Removed the remove of CVS subdirs...	fafa1971	6352d 04h	/s1_core/trunk/
14	Now the ACCESSES file perfectly documents the list of instructions fetched both by the T1 and the S1, and the difference is shown. To obtain the disassembled code the "disass" tool (under tools/opt) has been used.	fafa1971	6402d 19h	/s1_core/trunk/