OpenCores
URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] - Rev 154

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
134 SdData: Further refactoring. rkastl 4971d 04h /sdhc-sc-core/
133 SdData: Further refactoring rkastl 4971d 04h /sdhc-sc-core/
132 SdData: Refactoring, not done.
Testbench works again, but does not really test anything.		 rkastl 4971d 04h /sdhc-sc-core/
131 SdClockMaster added to regression tests rkastl 4971d 04h /sdhc-sc-core/
130 SdClockMaster: Formal verification rkastl 4971d 04h /sdhc-sc-core/
129 SdClockMaster: Redesigned, not finished. Tb with PSL assertions. rkastl 4971d 04h /sdhc-sc-core/
128 Sim: Support for psl files added. rkastl 4971d 04h /sdhc-sc-core/
127 Thesis: Restructured SDHC chapter. rkastl 4971d 04h /sdhc-sc-core/
126 Read and Write works in simulation, needs verification.
Synthesis works the same like before.		 rkastl 4971d 04h /sdhc-sc-core/
125 Write works in simulation rkastl 4971d 04h /sdhc-sc-core/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.