URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] - Rev 176

Rev	Log message	Author	Age	Path
156	SdVerification: + Split a SdCoreTransaction into multiple WbTransactions: Proof of Concept with a ReadSingleBlock-Transaction + Finish after certain amount of time and present simulation result	rkastl	4912d 16h	/sdhc-sc-core/
155	SdVerification: continue to work on it, not done.	rkastl	4912d 16h	/sdhc-sc-core/
154	SdVerification: - started sending with mailboxes	rkastl	4912d 16h	/sdhc-sc-core/
153	SdVerification: further development, not done by far	rkastl	4912d 16h	/sdhc-sc-core/
152	SdClockMaster: Generate InStrobe so that it the sd bus gets captured on the rising edge of the clock in high speed mode	rkastl	4912d 16h	/sdhc-sc-core/
151	Verification: + redesign: not functional yet	rkastl	4912d 16h	/sdhc-sc-core/
150	Testbed: + Simulation made possible + Write works - Sometimes the alignment in the block is not right	rkastl	4912d 16h	/sdhc-sc-core/
149	SdBFM: + mailbox mode	rkastl	4912d 16h	/sdhc-sc-core/
148	SdVerification: + CardModel: Execution thread which starts initialization and then receives token and parses them. TbdSd: + Added SdWbSdSynchronization.	rkastl	4912d 16h	/sdhc-sc-core/
147	Sd-Core: + Added checking of Busy signal after write	rkastl	4912d 16h	/sdhc-sc-core/