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[/] [sdhc-sc-core/] [trunk/] - Rev 150

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Rev Log message Author Age Path
130 SdClockMaster: Formal verification rkastl 4963d 14h /sdhc-sc-core/trunk/
129 SdClockMaster: Redesigned, not finished. Tb with PSL assertions. rkastl 4963d 14h /sdhc-sc-core/trunk/
128 Sim: Support for psl files added. rkastl 4963d 14h /sdhc-sc-core/trunk/
127 Thesis: Restructured SDHC chapter. rkastl 4963d 14h /sdhc-sc-core/trunk/
126 Read and Write works in simulation, needs verification.
Synthesis works the same like before.		 rkastl 4963d 14h /sdhc-sc-core/trunk/
125 Write works in simulation rkastl 4963d 14h /sdhc-sc-core/trunk/
124 Write: SdClk is disabled, if no data is available. rkastl 4963d 14h /sdhc-sc-core/trunk/
123 Write: Must be able to halt SdClk, rest is done. rkastl 4963d 14h /sdhc-sc-core/trunk/
122 SdController: Initial read support rkastl 4963d 18h /sdhc-sc-core/trunk/
121 SdWbSlave inserted into SdTop. SdController does not use it yet. rkastl 4963d 18h /sdhc-sc-core/trunk/

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