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[/] [sdhc-sc-core/] [trunk/] - Rev 156

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Rev Log message Author Age Path
136 SDHC:
- SdData refactored to use a single counter
- TestWbMaster added to TbdSd (not functional yet)		 rkastl 4928d 11h /sdhc-sc-core/trunk/
135 Multiple-Inclusion-Protection to SystemVerilog files added
Stops using relative paths in `includes. instead +incdir has to be used.		 rkastl 4928d 11h /sdhc-sc-core/trunk/
134 SdData: Further refactoring. rkastl 4928d 11h /sdhc-sc-core/trunk/
133 SdData: Further refactoring rkastl 4928d 11h /sdhc-sc-core/trunk/
132 SdData: Refactoring, not done.
Testbench works again, but does not really test anything.		 rkastl 4928d 11h /sdhc-sc-core/trunk/
131 SdClockMaster added to regression tests rkastl 4928d 11h /sdhc-sc-core/trunk/
130 SdClockMaster: Formal verification rkastl 4928d 11h /sdhc-sc-core/trunk/
129 SdClockMaster: Redesigned, not finished. Tb with PSL assertions. rkastl 4928d 11h /sdhc-sc-core/trunk/
128 Sim: Support for psl files added. rkastl 4928d 11h /sdhc-sc-core/trunk/
127 Thesis: Restructured SDHC chapter. rkastl 4928d 11h /sdhc-sc-core/trunk/

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