URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitSdVerificationTestbench/] [sim/] - Rev 177

Rev	Log message	Author	Age	Path
105	Changing speed works! refs #33	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
101	Receiving response to ACMD51 works including data, refs #33.	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
100	SdController: Receiving data after ACMD51, but CRC is wrong	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
94	CmdTimeout (8 Clocks) added, SdData inserted into top, refs #31	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
89	Fixes #27, R3 uses '1111111' as CRC.	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
88	Timeouts inserted, Sending Card status via Rs232 if changed	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
85	Synthese: TbdSd refactored to enable sharing. Sim: SdVerificationTestbench to new tcl script ported SdController: TimeoutGenerator added, refs #27	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
84	SdController: Refactored	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
83	SdCmd: Refactored	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/
60	Receiving a response to ACMD41 works (including busy, but voltage is not checked), refs #15.	rkastl	4924d 18h	/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/