OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] - Rev 47

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
27 Golden log file corresponds the SDRAM core level test case are added into svn dinesha 4531d 05h /sdr_ctrl/
26 invalid log files are removed dinesha 4531d 05h /sdr_ctrl/
25 tb.sv is renamed as tb_top dinesha 4531d 05h /sdr_ctrl/
24 Clean Up dinesha 4531d 05h /sdr_ctrl/
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4532d 11h /sdr_ctrl/
22 Pad sdram clock added dinesha 4532d 11h /sdr_ctrl/
21 Clean up dinesha 4532d 11h /sdr_ctrl/
20 8 Bit SDARM support is added dinesha 4534d 05h /sdr_ctrl/
19 8 Bit SDRAM Support added dinesha 4534d 05h /sdr_ctrl/
18 8 Bit SDRAM Support is added dinesha 4534d 05h /sdr_ctrl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.