URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] - Rev 81

Rev	Log message	Author	Age	Path
61	now generate dut files for coverage removed use of lndir	jt_eaton	5070d 15h	/socgen/trunk/
60	moved alu_logic into seperate component	jt_eaton	5071d 03h	/socgen/trunk/
59	added filelist.core to syn dirs to customize core	jt_eaton	5071d 03h	/socgen/trunk/
58	removed old Makefiles	jt_eaton	5071d 18h	/socgen/trunk/
57	Now generate all filelists from xml files	jt_eaton	5071d 18h	/socgen/trunk/
56	soc_builder now builds verilog from xml files	jt_eaton	5077d 03h	/socgen/trunk/
55	removed pre-rout and gates sims	jt_eaton	5079d 23h	/socgen/trunk/
54	now set up fpga targets from xml files	jt_eaton	5080d 00h	/socgen/trunk/
53	fixed check_fpgas	jt_eaton	5082d 13h	/socgen/trunk/
52	removed noworking sims and syn	jt_eaton	5082d 14h	/socgen/trunk/