URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] - Rev 97

Rev	Log message	Author	Age	Path
77	now generate syn and cov Makefiles leave log and out files in sim/run directory	jt_eaton	4992d 03h	/socgen/trunk/
76	added wave.save files now generate sims Makefile and params.sim leave sim log and vcd files in sim/run/directory	jt_eaton	4994d 08h	/socgen/trunk/
75	added linting using verilator	jt_eaton	4998d 01h	/socgen/trunk/
74	split out sw Makefile into projects /bin split out _cpu into seperate component	jt_eaton	5003d 06h	/socgen/trunk/
73	removed dup png files	jt_eaton	5011d 06h	/socgen/trunk/
72	split T6502 into components moved io_module into seperate project removed liblists direct loads filelists for sims and coverage add hier type into xml files to generate verilog	jt_eaton	5011d 08h	/socgen/trunk/
71	ignore anything in work	jt_eaton	5018d 00h	/socgen/trunk/
70	ignore work	jt_eaton	5018d 01h	/socgen/trunk/
69	added work dir	jt_eaton	5018d 01h	/socgen/trunk/
68	moved to seperate components	jt_eaton	5021d 00h	/socgen/trunk/