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[/] [t48/] [tags/] [rel_0_3_beta/] - Rev 344

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Rev Log message Author Age Path
111 split 4k internal ROM into
+ 2k internal ROM
+ 2k external ROM
EA of t48_core is driven by MSB of internal ROM address
if upper 2k block is selected, the system switches to EA mode on the fly		 arniml 7317d 03h /t48/tags/rel_0_3_beta/
110 exchange syn_rom for lpm_rom arniml 7317d 03h /t48/tags/rel_0_3_beta/
109 add new bug for release 0.1 BETA arniml 7317d 16h /t48/tags/rel_0_3_beta/
108 Fix for:
External Program Memory ignored when EA = 0		 arniml 7317d 16h /t48/tags/rel_0_3_beta/
107 tie EA to '1' arniml 7317d 16h /t48/tags/rel_0_3_beta/
106 clean-up use of ea_i arniml 7317d 16h /t48/tags/rel_0_3_beta/
105 initial check-in
describe bugs of release 0.1 BETA		 arniml 7320d 02h /t48/tags/rel_0_3_beta/
104 add white_box directory to test suite arniml 7320d 23h /t48/tags/rel_0_3_beta/
103 add testbench peripherals for P1 and P2
this became necessary to observe a difference between externally applied
port data and internally applied port data		 arniml 7320d 23h /t48/tags/rel_0_3_beta/
102 update for changes in address space of external memory arniml 7320d 23h /t48/tags/rel_0_3_beta/

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