URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_3_beta/] [rtl/] [vhdl/] - Rev 66

Rev	Log message	Author	Age	Path
24	connect control signal for Port 2 expander	arniml	7415d 07h	/t48/tags/rel_0_3_beta/rtl/vhdl/
23	rework Port 2 expander handling	arniml	7415d 07h	/t48/tags/rel_0_3_beta/rtl/vhdl/
22	merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A	arniml	7415d 07h	/t48/tags/rel_0_3_beta/rtl/vhdl/
21	implement mnemonics: + MOVD_A_PP + OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A	arniml	7415d 07h	/t48/tags/rel_0_3_beta/rtl/vhdl/
20	move code for PROG out of if-branch for xtal3_s	arniml	7415d 07h	/t48/tags/rel_0_3_beta/rtl/vhdl/
7	initial check-in	arniml	7418d 23h	/t48/tags/rel_0_3_beta/rtl/vhdl/
6	moved to system directory	arniml	7418d 23h	/t48/tags/rel_0_3_beta/rtl/vhdl/
4	initial check-in	arniml	7419d 23h	/t48/tags/rel_0_3_beta/rtl/vhdl/