URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] - Rev 217

Rev	Log message	Author	Age	Path
197	preliminary version 0.3	arniml	6841d 00h	/t48/tags/rel_0_6_1_beta/
196	update to version 0.3	arniml	6841d 00h	/t48/tags/rel_0_6_1_beta/
195	Suppress assertion of bus_read_bus_s when interrupt is pending. This should fix bug report "PROBLEM WHEN INT AND JMP"	arniml	6841d 03h	/t48/tags/rel_0_6_1_beta/
194	initial check-in	arniml	6841d 03h	/t48/tags/rel_0_6_1_beta/
193	iManual	arniml	6856d 05h	/t48/tags/rel_0_6_1_beta/
192	update list for Wishbone toplevel	arniml	6856d 16h	/t48/tags/rel_0_6_1_beta/
191	preliminary version 0.2	arniml	6856d 19h	/t48/tags/rel_0_6_1_beta/
190	finalize change log for release 0.6 beta	arniml	6857d 14h	/t48/tags/rel_0_6_1_beta/
189	add bug report "Target address of JMP and CALL to Program Memory Bank 1 corrupted by interrupt"	arniml	6888d 16h	/t48/tags/rel_0_6_1_beta/
188	move check for int_pending_s into ea_i_='0' branch this fixes a glitch on PCH when an interrutp occurs during external program memory fetch	arniml	6888d 16h	/t48/tags/rel_0_6_1_beta/