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[/] [t48/] [tags/] [rel_0_6_beta/] - Rev 136

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Rev Log message Author Age Path
116 adapt to GHDL 0.12 / gcc 3.4.0 arniml 7378d 22h /t48/tags/rel_0_6_beta/
115 extend description arniml 7380d 03h /t48/tags/rel_0_6_beta/
114 initial check-in arniml 7383d 22h /t48/tags/rel_0_6_beta/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7390d 08h /t48/tags/rel_0_6_beta/
112 update tb_behav_c0 for new ROM layout arniml 7390d 08h /t48/tags/rel_0_6_beta/
111 split 4k internal ROM into
+ 2k internal ROM
+ 2k external ROM
EA of t48_core is driven by MSB of internal ROM address
if upper 2k block is selected, the system switches to EA mode on the fly		 arniml 7390d 08h /t48/tags/rel_0_6_beta/
110 exchange syn_rom for lpm_rom arniml 7390d 08h /t48/tags/rel_0_6_beta/
109 add new bug for release 0.1 BETA arniml 7390d 21h /t48/tags/rel_0_6_beta/
108 Fix for:
External Program Memory ignored when EA = 0		 arniml 7390d 21h /t48/tags/rel_0_6_beta/
107 tie EA to '1' arniml 7390d 21h /t48/tags/rel_0_6_beta/

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