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Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_beta/] - Rev 154

Rev	Log message	Author	Age	Path
134	Fix bug report: "PSENn Timing" PSEN is now only asserted for the second cycle if explicitely requested by assert_psen_s. The previous implementation asserted PSEN together with RD or WR.	arniml	7241d 11h	/t48/tags/rel_0_6_beta/
133	add checks for PSEN	arniml	7241d 11h	/t48/tags/rel_0_6_beta/
132	stop simulation upon assertion error	arniml	7241d 11h	/t48/tags/rel_0_6_beta/
131	update	arniml	7241d 12h	/t48/tags/rel_0_6_beta/
130	initial check-in	arniml	7241d 12h	/t48/tags/rel_0_6_beta/
129	cleanup copyright notice	arniml	7303d 19h	/t48/tags/rel_0_6_beta/
128	counter_q is not cleared during reset this would match all different descriptions of the Counter as a) if the software assumes that the Counter is modified during reset, it will initialize the Counter anyhow b) the special case 'Counter not modified during reset' is covered	arniml	7310d 23h	/t48/tags/rel_0_6_beta/
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7311d 00h	/t48/tags/rel_0_6_beta/
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7311d 00h	/t48/tags/rel_0_6_beta/
125	exclude from dump compare	arniml	7311d 00h	/t48/tags/rel_0_6_beta/